
# PlanAhead Launch Script for Post PAR Floorplanning, created by Project Navigator

create_project -name sword4-test-bench -dir "D:/_FPGA/ARC_2020/Lab2_Pipeline_Demo/sword4-test-bench/planAhead_run_1" -part xc7k325tffg676-2L
set srcset [get_property srcset [current_run -impl]]
set_property design_mode GateLvl $srcset
set_property edif_top_file "D:/_FPGA/ARC_2020/Lab2_Pipeline_Demo/sword4-test-bench/mips_top.ngc" [ get_property srcset [ current_run ] ]
add_files -norecurse { {D:/_FPGA/ARC_2020/Lab2_Pipeline_Demo/sword4-test-bench} {ipcore_dir} }
add_files [list {ipcore_dir/icache.ncf}] -fileset [get_property constrset [current_run]]
set_property target_constrs_file "mips_top.ucf" [current_fileset -constrset]
add_files [list {mips_top.ucf}] -fileset [get_property constrset [current_run]]
link_design
read_xdl -file "D:/_FPGA/ARC_2020/Lab2_Pipeline_Demo/sword4-test-bench/mips_top.ncd"
if {[catch {read_twx -name results_1 -file "D:/_FPGA/ARC_2020/Lab2_Pipeline_Demo/sword4-test-bench/mips_top.twx"} eInfo]} {
   puts "WARNING: there was a problem importing \"D:/_FPGA/ARC_2020/Lab2_Pipeline_Demo/sword4-test-bench/mips_top.twx\": $eInfo"
}
